CME 341

This course investigates techniques for designing large digital circuits with the Verilog Hardware Description Language (Verilog HDL). The course focuses on FPGAs; however, the techniques discussed are also applicable to the design of ASICs. The architectures of FPGAs are discussed in general with certain aspects of their internal operation discussed in detail. Emphasis is placed on connecting the Verilog HDL code to the hardware circuit that is constructed by the Verilog compiler and router.