CME 435
Verification of Digital Systems
Lec 01 and Tut T01 selected
Covers the verification of digital circuits and systems with emphasis on SystemVerilog, a verification language. It starts with the basics, such as functional verification methodologies, and SystemVerilog fundamentals, and gradually builds to more complex examples and advanced topics. At the end of the course, a complete verification system is created using SystemVerilog.
Sections
Lecture
Lec 01
Tue, Thu 8:30-9:50
Tutorial
Tut T01
Mon 14:30-17:20
Syllabus
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